**Circuit Challenge 3**

Consider the circuit shown below.

**Initial Conditions**

The switch has been open a long time.

There is no charge on the capacitor; therefore its voltage is 0V.

The voltage on the capacitor is not changing; therefore there is no current in the capacitor.

No current is flowing in the loop; therefore there is no energy in the inductor.

The current is not changing in the loop; therefore there is no voltage on the inductor.

To summarize**:** This circuit is at rest. Except for the battery, not one scintilla of energy can be found in the network.

**Circuit Elements**

The battery is ideal (no resistance, no inductance, and the voltage is invariant with load)

The switch is ideal (∞ Ohms when open, 0 Ohms when closed, no inductance, no bounce)

The diode is ideal (no forward voltage drop, infinite reverse breakdown, no capacitance)

The inductor is ideal (no resistance, no capacitance, and L is a fixed value)

The capacitor is ideal (no resistance, no inductance, and C is a fixed value)

The wire is ideal (no resistance, no inductance)

**The Challenge**

At time t=0 the switch is closed, and it remains closed. You are to answer the following questions**:**

1. What is the maximum voltage that will appear on the capacitor?

2. When (t=?) will this maximum voltage appear?

3. What maximum current will flow in this circuit?

4. When (t=?) does this maximum current flow?

You may verify your answers by clicking **here**.

**Philosophical Declaration and Concomitant Commentary**

##### Some readers may be uncomfortable with the concept of* ideal* circuit elements. Nevertheless, determining solution sets for ideal circuit configurations should precede attempts to analyze their parasitic-laden counterparts. Gaining an intuitive understanding of ideal circuit operation ought to be a high priority. Then, when parasitics are introduced, the practitioner will be better prepared to understand what is observed, and better prepared to synthesize complex circuitry in pursuit of desired results.

What we urge here is this: Become acquainted with ideal circuit behavior first. Then consider the effect of each parasitic that will reside in an actual circuit. *Then* use a simulator.